Embodiments of the present invention are directed generally to semiconductor devices, and more particularly, devices and methods for providing transient voltage suppression for integrated circuits.
As integrated circuit technology continues to advance, devices are becoming smaller and operating voltages lower. At the same time, the devices are becoming faster and operating frequencies are higher. As a result, it is more difficult for transient voltage suppressor (TVS) or electrostatic discharge (ESD) protection devices to meet these requirements for today's integrated circuits. The TVS or ESD devices must provide a low breakdown voltage and low capacitance to satisfy the low voltage high speed requirements.
Many conventional TVS or ESD protection devices use a Zener (p+/n+ junction), diode to provide this ESD protection. Certain conventional electrostatic discharge (ESD) protection devices use the n+/p+ junction between an n-type region and the underlying p-type substrate as the clamping diode, often referred to as a Zener diode. After the clamping diodes are formed, other devices, such as P-N diodes are formed on top of this Zener diode to result in the other desired devices. Examples of such Zener diodes are disclosed in, e.g., U.S. Pat. No. 7,579,632 issued Aug. 25, 2009 to A. Salih et. al. and U.S. Pat. No. 7,538,395 issued on May 26, 2009 to T. Keena et. al. In some of those devices, the Zener diode is the buried layer to substrate diode. In general it is important for the clamping diode to exhibit both low leakage and a desired breakdown voltage. Furthermore, even though such ESD devices appear to provide a compact structure, they can suffer from many limitations, such as process complexity and difficulty in device parameter control, especially in achieving the desired clamping voltage and leakage combination. Some of the limitations are described in more detail below.
Therefore, it is desirable to have an improved transient voltage suppressor (TVS) or electrostatic discharge (ESD) device